- PXI Express specification Rev. 1.0 compliant
- 2 simultaneously analog inputs, up to 200 MS/s sampling rate, and High resolution 14-bit ADC
- Up to 90 MHz bandwidth for analog input
- 1 GB onboard storage memory
- Programmable input voltage range of ±0.2 V, ±2 V, or ±10 V
- One external digital trigger input and one external trigger output
- Full auto-calibration
- Support signal averaging feature
The ADLINK PXIe-9852 is a 2-CH 14-bit 200 MS/s digitizer for high frequency and wide dynamic range signals with an input frequency up to 90 MHz. The 90 MHz bandwidth analog input with 50Ω impedance is designed to receive ±0.2 V, ±2 V, or ±10 V high speed signals. With a PCI Express bus interface and ample onboard acquisition memory up to 1 GB, the PXIe-9852 easily manages simultaneous 2-CH data streaming. With high speed and high linearity 14-bit A/D converters and high stable onboard reference, the PXIe-9852 provides both high accuracy and high dynamic performance, making it ideal for applications requiring high-speed data acquisition, such as optical fiber and LIDAR testing, and video signal analysis.
- Sampling rates up to 200 MS/s, delivering 83 dB SFDR, 62 dB SNR and -81 dB THD
- 14-bit high resolution ADC
- Software-selectable 50Ω or 1MΩ input impedance, input range ±0.2V, ±2V, or ±10
On-board Signal Averaging Technology
The PXIe-9852 is equipped with onboard Signal Averaging Technology, allowing detection of small repetitive signals in noisy environments, with no CPU loading, suitable for applications requiring extraction of small signals from background noise such as optical fiber testing.
Data Streaming Up to 800MB/s
- Based on PCI Express Gen2 technology, the PXIe-9852 streams data on both channels at maximum data rate (200 MS/s), enabling continuous delivery to the host PC at rates up to 800 MB/s
- Using an 8 x 500 GB driver RAID system (4TB) extends capture sessions beyond one hour
When performing high channel count data acquisition, the PXIe-9852ÿÿs built-in phase-locked loop (PLL) allows multiple modules to lock to an external reference timing signal, such as PXI_CLK10 or PXIe_CLK100 from the PXI chassis backplane, such that each module can perform measurements simultaneously.
||2-CH 14-Bit 200 MS/s High-Speed PXI Express Digitizer
||SSI bus cable for two, three, and four devices